"Official" voltages, "safe" voltages, required voltages, and reasonable voltages may all be different numbers.
Officially, no DDR3 ICs are rated above 1.5v for their nominal voltage, and all are required to handle 1.575v long term. However, all DDR3 ICs are required to withstand 1.975v for (very) short periods without permanent damage.
In practicality, safe voltages will differ, and this will depend on many factors. Some early DDR3 ICs will handle 2v all day and night without issue. Other ICs will fail at 1.6v, if used for prolonged periods.
Much DDR3, especially those that are rated for 1.65v, or that are otherwise outside of JEDEC spec, is essentially binned and warranted for a certain OC by the manufacturer.
Originally Posted by Rokabud
And about the locked BLCK on SB systems, would increasing the BLCK on Sandy Bridge rather than the multiplier still yield better results if it were possible? Why was the BLCK locked in the first place then? Would it not be better to overclock through that then the multiplier?
BCLK, in and of itself is irrelevant. It's not a front-side bus, or any bus at all. It's just a reference for multipliers to work off.
This has been standard for AMD since the first Athlon 64s and for Intels since the original core i7.
If CPU, uncore, and memory speeds are the same, it does not matter what BCLK is used to reach those speeds, performance will remain the same.
BCLK was "locked" because it's simpler to tie all the buses to it (allowing asynchronous clocks requires multiple clock generators or the addition of many PLLs to separate clock domains), and because it allows Intel to charge a modest premium for CPUs capable of significant OCing. It also prevents market cannibalization because all the K series CPUs are fairly high-end ones. The days of buying 50-100 dollar CPUs and matching the performance of a 300+ dollar chip are over.