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Shouldn't your delta be better than that relative to Jwick? Maybe the real issue here is your mount?
This is his VMIN for 5.9 at 33c liquid and on direct die. I said that is 70mv worse compared to my chip at the same temps(extrapolated)
He is arguing that his liquid temps are worse and if it were lower like mine( my liquid temp was at 20c ), it would be closer to mine. I told him that it would but then you will have over 10 degrees lower temps than i do because you are on direct die which would not be a fair comparison.

1.275V load vmin at 88C (33c liquid) { VOUT }
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Here is mine
1.205V load vmin at 75C (20c liquid) { VOUT }
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1.23v load VMIN at 86C (26c liquid) {VOUT}
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The video with the voltage claim was "Rambling about the new Intel 13th/14th gen Intel recommended default settings."

Commenter said
In non-public documentation: the Vrel for Raptor Lake is 1.45V up to 70C and then it drops to about 1.3V at 100C. And the whole deal with eTVB (because that's got ****ty documentation) is that it basically jacks up the voltage closer to Vrel to reach higher frequencies, and you'd hit 5.8Ghz no problem up to 100C and 1.3V (in theory) but then it's like "hey we need 6Ghz to be competitive so let's crank to 1.4V". "So....yeahhhhhh" best to make sure the thing isn't slamming more than 1.45V in for extended periods. I wonder if Intel will do an Nvidia and lock you to Vrel as a "PerfCap". In other fun facts, the 14900K was 'hoped' to be 6.2Ghz and the KS at 6.5Ghz.
Where would worst sample VID (with TVB voltage optimization) vs their ratio clipping temperatures end up if plotted?
 
Where would worst sample VID (with TVB voltage optimization) vs their ratio clipping temperatures end up if plotted?
In some of the screenshots posted by other users I've seen 1.484V for 6.2 GHz , and I think the clipping temperature is at 70 °C. TVB optimizations at least on my 12th gen CPU decrease voltages by 1.5 mV / °C (but this might change depending on the SKU, and the equation is not exactly linear).

1.5V at 70 °C with TVB optimizations could be about 1.45V, so right at the edge of what would be continuously allowed.

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First of all power draw is affected by temps at the same settings. This means if i ran 1.275v load at 33c liquid, my power consumption will be higher than at 20c because of the temp difference.
you are still not getting my point. we are trying to do a fair comparison between my chip and yours to prove the fact that V/F is meaningless for silicon quality indicator.
Do you agree to the fact that if i put my chip in your system with direct die at 33c liquid temp, it will do 5.9 at 1.206v load and it will be at the same temp(almost because there are variances in resistivity of cpus and also how flat the die is for direct die) as i do on my system with 20c liquid. This should be obvious to anyone because it is known that iceman direct die drops 10-15c and since your liquid temps are higher, your temps would match mine because i am not on direct die. It would not be a fair comparison if i matched your liquid temp because i am NOT ON DIRECT DIE.
I don't want to run 1.275v into my chip to prove that my temps will match yours at 20c degree water because that is violating intel spec by over 60mv, which is why i asked you earlier to run at load 1.21v(1.33v llc6) at the same liquid temp you had ran the 5.9 run to check if our core temps are matching.

I never said you won't be able to do lower voltage if your temps were lower. Infact, i proved that it does. i wanted to match our core temps ( NOT LIQUID TEMPS BECAUSE YOU ARE ON DIRECT DIE ) for a fair comparison to check if V/F is the end all be all for silicon quality.
You are more than welcome to send me your chip to test out but need to delid it 1st :p whats this about violating Intel spec , is this not OCN where things are pushed a bit beyond their limit or now its all within " Intel Spec " 😔 As mentioned i will 100% run the test again and even rerun the 5.9 but when temps are somewhat more realistic with how i normally test which is in the mid 20's WT. It was mention previously that all the higher SP fall inline within one another by 10mv or so at 6ghz mine included and i specifically said its a lot closer than the V/F would have you believe
 
I've read this in a Youtube comment (might have been in one of Buildzoid's videos, don't recall which one):



Can anybody confirm in a way or another? If voltage shouldn't be higher than 1.3V at 100 °C and 1.45V at 70 °C and the relationship is linear, we could derive that for other voltages as well.

View attachment 2659280
Not linear: progressively higher voltages would require even lower temperatures, don't know how it would behave when approaching 0K(irrelevant from a engineering point though). The numbers from that comment look solid: last year Derb8uer in an interview with an Intel engineer in his Youtube channel asked him about this and he told that they usually set for voltages of 1.2-1.3V for heavy loads and that throttling in those conditions was fine(100C). So the 1.3V@100C voltage reliability is good.

I would picture it drawing from the comment as:

1.3V@100C
1.45V@70C
1.6V@30C
1.75V@-20C
1.9V@-80C
2.05V@-150C

Temperature slopes would get bigger for the same voltage slope as voltage increases: for practical real world use the slope increase could be approximated as linear.
 
Shouldn't your delta be better than that relative to Jwick? Maybe the real issue here is your mount?
its mounted as good as it can be and core to core delta is around 9 deg ( not the best but not the worst ) , i suppose it would be good to see another iceman user post temp who is not using a chiller basically similar setup to mine to see where there delta is at . As i have mentioned previously my water at 33deg is doing me no favours but is what it is without a chiller and going into summer , room temp is up at 28 deg .... everything is just hot 😂

Water Temp is Key ... 23 deg water temp with 380W with 55deg delta 1.288Vcore min for R23 multi runs

Image


Water temp at 30 deg with 400W and 60 deg delta but needed more vcore at 1.314vmin to pass

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Not linear: progressively higher voltages would require even lower temperatures [...]
Interesting. From the data points, like this, then?

Rectangle Slope Plot Font Parallel

Although for a more practical temperature range it will be like this:

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I imagine that people who deliberately (or not, due to motherboard default settings) disable TVB might be at risk of long-term degradation in some usage scenarios.

This seems important information to keep in mind when overclocking, it's a pity that it isn't in the public datasheets.
 
In some of the screenshots posted by other users I've seen 1.484V for 6.2 GHz , and I think the clipping temperature is at 70 °C. TVB optimizations at least on my 12th gen CPU decrease voltages by 1.5 mV / °C (but this might change depending on the SKU, and the equation is not exactly linear).

1.5V at 70 °C with TVB optimizations could be about 1.45V, so right at the edge of what would be continuously allowed.

View attachment 2659292
Worst case is quite a bit higher.

Image
 
its mounted as good as it can be and core to core delta is around 9 deg ( not the best but not the worst ) , i suppose it would be good to see another iceman user post temp who is not using a chiller basically similar setup to mine to see where there delta is at . As i have mentioned previously my water at 33deg is doing me no favours but is what it is without a chiller and going into summer , room temp is up at 28 deg .... everything is just hot 😂

Water Temp is Key ... 23 deg water temp with 380W with 55deg delta 1.288Vcore min for R23 multi runs

Image


Water temp at 30 deg with 400W and 60 deg delta but needed more vcore at 1.314vmin to pass

Image
It just didn't seem like from the #'s you posted (post I quoted before) that your delta is low enough. Should be 10-20C lower, at least based on what others say in regards to the temp drop from going DD. Either that or I need to buy an Optimus block. ;)
 
Worst case is quite a bit higher.

Image
This is close to some of the worst 12900KS samples I've seen screenshots posted of in the past.

I'm not aware here if Enhanced TVB with 13/14th gen CPUs scales the TVB cutoff temperature dynamically or if TVB optimizations reduce voltages on the best cores more aggressively with these CPUs. If not, then Intel might be indeed having default VIDs for some processors that can cause long-term degradation (if the previously posted information on temperature vs voltage is generally valid, that is).
 
Is 70C where the single core 6.2 is clipped? If so, is that where it is supposed to be clipped? I am too ignorant of how the Raptor i9 are supposed to work, 12th i7 clock ratios are pretty simple.

On Zen 3, besides the current, power, and temperature limits the chips had a voltage max parameter. Precision Boost would not pick a ratio if it violated the limit. Which became a bigger deal with the second EDC "bug" where on certain AGESA if EDC set above sku default, a negative offset was applied to voltage max limit.
 
It just didn't seem like from the #'s you posted (post I quoted before) that your delta is low enough. Should be 10-20C lower, at least based on what others say in regards to the temp drop from going DD. Either that or I need to buy an Optimus block. ;)
would be interested to see actual results from other Iceman users to compare tbh to find out if something is wrong with mine although it just about manages to cool 450W so always assumed it was ok 😂 but yeah that Optimus block Jwick is using must be the secret sauce :p very very impressive results with the IHS still in place and i assumed untouched:cool:
 
Is 70C where the single core 6.2 is clipped? If so, is that where it is supposed to be clipped? I am too ignorant of how the Raptor i9 are supposed to work, 12th i7 clock ratios are pretty simple.
I assumed so, as mentioned here for example:

The primary difference is that the 14900KS's P-cores have a 200 MHz higher Thermal Velocity Boost (TVB) than the standard 14900K, meaning the chip can hit 6.2 GHz on two cores if it remains under 70C. The P-cores are also 100 MHz faster during standard Turbo Boost 3.0, while the E-cores have a 100 MHz boost clock increase.
I think it clips voltages by 200 MHz, but I'm not 100% sure. The "Enhanced" version of TVB on 14th gen GPUs might also have other tricks. For example, for the 14900K Skatterbencher mentioned:


When Thermal Velocity Boost (TVB) is active, the two favored P-cores can boost to 6.0 GHz. Typically, TVB also adds an extra ratio in scenarios with more than two active cores. But, again, that’s unclear for the 14900K. The TVB temperature has traditionally been 70 degrees Celsius; however, that is also unclear for the 14900K, as 6 GHz can be reached even when the cores are 100 degrees Celsius.
 
Is 70C where the single core 6.2 is clipped? If so, is that where it is supposed to be clipped? I am too ignorant of how the Raptor i9 are supposed to work, 12th i7 clock ratios are pretty simple.

On Zen 3, besides the current, power, and temperature limits the chips had a voltage max parameter. Precision Boost would not pick a ratio if it violated the limit. Which became a bigger deal with the second EDC "bug" where on certain AGESA if EDC set above sku default, a negative offset was applied to voltage max limit.
Usually 13th/14th Gen i9 by default behave:

  • 2-core max boost is clipped at 70C due to TVB(how much varies per SKU)
  • IABT when enabled allows the CPU to hit #8 v/f point all-core as long as the CPU is within power limits, ICCmax and temperature is lower than 70C. If temperature is hit it clips by -1 ratio until temperature remains below 70C. Max clipping is #7 v/f point which is advertised Turbo Boost 2.0 all-core frequency.
Sounds like a reasonable limit: this CPU already pull enough power in worst cases loads at Turbo Boost 2.0 frequencies to bring any air cooler or AIO to it's knees. If wanting to set up to take advantage of TVB in all-core boosts is better to have some massive cooling otherwise TVB is going to be almost permanently clipping frequency and that doesn't really help to get performance. Even direct die TVB is worthless when running Vcore of around 1.6V: at that point any burst triggers TVB clipping as soon at it starts because the CPU gets hot real quick: thermal density of this chips is a *****.
 
Right, thank you. What I was getting at in part was whether 70C limit on top ratios appears in NDA stuff. Or was this another tweak coming from board vendors?
 
would be interested to see actual results from other Iceman users to compare tbh to find out if something is wrong with mine although it just about manages to cool 450W so always assumed it was ok 😂 but yeah that Optimus block Jwick is using must be the secret sauce :p very very impressive results with the IHS still in place and i assumed untouched:cool:
I get close with the Core1 block and right at 300l/h flow. Looks like 57C delta at 342w running R15 Extreme. Looked like Jwick had ~55C delta at ~340w.

Optimus uses that insanly fine fin grid, so it may be slightly better than the Core1. Haven't seen an reviews for it though to confirm.

What is your delta at 340w?

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I get close with the Core1 block and right at 300l/h flow. Looks like 57C delta at 342w running R15 Extreme. Looked like Jwick had ~55C delta at ~340w.

Optimus uses that insanly fine fin grid, so it may be slightly better than the Core1. Haven't seen an reviews for it though to confirm.

What is your delta at 340w?

View attachment 2659297
don't look at package power draw as it is based on vid. POUT is always accurate.
 
don't look at package power draw as it is based on vid. POUT is always accurate.
No working for some reason. I suspect it's close though since the board sets DCLL automatically.

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