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*Official* Intel DDR5 OC and 24/7 daily Memory Stability Thread

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4.7M views 34K replies 1.2K participants last post by  remittor  
#1 · (Edited)
Let it begin, boys...

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There's this guide: MemTestHelper/DDR4 OC Guide.md at oc-guide · integralfx/MemTestHelper
While it's written for DDR4, and the specific timing recommendations don't really apply, the principle and order of tightening timings remains the same (lower one timing at a time, test stability, rinse and repeat)

Here's what's changed in terms of DDR5 OC on Intel CPUs:
  • tCL needs to be a multiple of the gear ratio, in gear 2 that means it has to be an even number, while gear 4 means it needs to be a multiple of 4
  • tRCD and tRP are now separate timings
  • tREFI can now run as high as 262143, this is the only timing where higher = better.
  • Tertiary timings for Intel on DDR5 are now at minimum 7, rather than 4.
  • Due to the increased number of banks on DDR5, _dg timings have a significant impact on performance, _sg timings doesn't make the same kind of difference.
  • tRFCpb / tRFCsb is a new timing, which refreshes a single bank, this allows the CPU to still access memory while data is being refreshed. Tightening it works similarly to tRFC.
  • Some testmem5 presets work better than others, ironically enough I've found 1usmus_v3 to work quite well.
  • tWR is controlled by tWRPRE and tWRPDEN, if you want a formula: tWR = tWRPDEN - (tCWL + 8)
  • tWTR_S and tWTR_L are controlled by tWRRD_dg and tWRRD_sg respectively. tWRRD_dg and _sg can have a significant impact on performance, and they can often only tighten 2-6 ticks from stock timings.

For the Hynix ICs you're using, here are my suggestions as a starting point:
VDD/VDDQ: 1.35V
tCL 11 ns
tRCD 13 ns
tRP 13 ns
tRAS 13 ns
tRFC 130 ns
tRFCpb 90 ns

Note that I listed these values in terms of absolute time, and you'll have to multiply them by the actual frequency to get a suggested timing.

Example: tCL at DDR5-5600
DDR5-5600 has an actual frequency of 2.8 GHz
tCL is suggested 11 ns

tCL in ticks = 11 ns * 2.8 GHz = 30.8
Rounded up to the nearest multiple of 2, we get tCL 32 as a starting point.

For the rest of the timings, we then get
tRCD 37
tRP 37
tRAS 37
tRFC 364
tRFCpb 252

I use GigaHertz here because Giga (10^9) complements nano (10^-9) so that I don't need to multiply or divide by 1000


Hope this is at least somewhat helpful to you.
 

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#23,901 ·
TX VDDQ above 1.45V is kinda sus, but hardly ever required. MC is VDD2 and we technically do not yet know what the limit is, but I would suggest not going above 1.5V for 24/7 use, not that you'd need more anyway. What your RAM can do at 1.5 VDD/VDDQ is usually the optimal limit, and having VDD2 above VDD isn't necessary.

I have run 1.6 VDD2 before and didn't notice any degradation, but I didn't feel super comfortable with it.
I can agree, after 1.5V VDD/VDDQ it won’t scale anymore and not only that but it’s getting even more unstable from heat increasement.

I am stuck at the moment, nothing I change will make me more stable and I can’t tighten my timings at all. I really hope that watercooling the dims will make a big difference , it’s my last hope.
 
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#23,902 ·
damn maybe just me but those last couple offsets besides the last look super high, but u also have a leaky cpu right idk if that means anything? for me my offsets on LLC4 are like -30 to -40 max - though i'm sure alot of stuff can change this i've gotten a couple points multiple times to where if I even lower them 0.001 it will fail stuff like cb15 and or gb3 until i raise it back up, i guess the question is what benchmarks do you run for stability? if i were to try some offsets anywhere near those it would instantly crash/error on benchmarks

here is the cpu i'm using atm though which is my bros (old pic without offsets)
View attachment 2646471
This is far from leaky, it's a nice one!
Last point I need to be high, because the TVB boost is 6.2 GHz. You can test it with Geekbench 6. Just run it several times, if you always get result, the low load boost is good.
 
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#23,903 ·
I have run 1.6 VDD2 before and didn't notice any degradation, but I didn't feel super comfortable with it.
VDD2 is made by an external Voltage regulator on the board, I don't think it could degrade the CPU, or the RAM at all.
For me it scales well until 1.537V. But that depends on the RAM VDD too.
 
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#23,904 ·
TeamGroup Xtreem 48GB DDR5 8000 C38 1.4v

Anyone else have these sticks?

These are optimized timings, but definitely reduced or min/maxed. I'm curious what others have gotten with them + 790 Apex Encore.


Image
 
#23,909 ·
VDD2 is made by an external Voltage regulator on the board, I don't think it could degrade the CPU, or the RAM at all.
For me it scales well until 1.537V. But that depends on the RAM VDD too.
Exactly; however I know there was a limit that individuals always used to quote with DDR4. However, the fact that we had 1.6V XMP kits suggests our CPUs (and boards) should be capable of withstanding at least 1.6V from the DDR rail.
 
#23,911 · (Edited)
Clock em up 9000c38 gaming 😎🤟
 
#23,913 ·
Finally installed my Iceman Cooler Direct Ram Block today with Arctic TP-3 Thermal Pads. Did some quick testing with some 8000c36 profile and only 1.45V Vdd/Vddq. Will go back to my old 8200c34 profile and test this again but so far the contact and my temps are pretty decent. Using a Mora-420 with Dual D5, Iceman Direct Die and Iceman Direct Ram block. After 1h of y-cruncher the Delta was 2C. Water: 26.6C Sticks: 28.5C
Image

Image
 
#23,914 ·
Finally installed my Iceman Cooler Direct Ram Block today with Arctic TP-3 Thermal Pads. Did some quick testing with some 8000c36 profile and only 1.45V Vdd/Vddq. Will go back to my old 8200c34 profile and test this again but so far the contact and my temps are pretty decent. Using a Mora-420 with Dual D5, Iceman Direct Die and Iceman Direct Ram block. After 1h of y-cruncher the Delta was 2C. Water: 26.6C Sticks: 28.5C
View attachment 2646632
View attachment 2646633
Nice build! What backplate are you using with those screws there? Looks like a button head with a spacer?
 
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#23,915 ·
Exactly; however I know there was a limit that individuals always used to quote with DDR4. However, the fact that we had 1.6V XMP kits suggests our CPUs (and boards) should be capable of withstanding at least 1.6V from the DDR rail.
Yes. Actually that’s where the value gets yellow color in ASUS bios. Or maybe a bit higher.
It’s CPU dependent how good it scales with memory speed .
 
#23,917 ·
View attachment 2646222 View attachment 2646221

I know it's been a while, but I recently decided to rebuild a modest rig. I picked up some relatively cheap Trident Z5 6400C32 A-die and a relatively cheap Maximus Z690 Formula.

Settings:
7000 32-42-42-42-28-2T (Maximus Tweak Mode 2)
ctlvrefup - 126
RttWr - 34
RttNomRd - 48
RttNomWr - 48
RttPark - 40
RttParkDqs - 34
SA PLL - 1.02V
MC PLL - 1.02V
VCCIN AUX - Auto
VCCSA - 1.1V
TX VDDQ - 1.3V
VDD2 - 1.475V
VDD/VDDQ - 1.5V
VPP - Auto

The 13900K I'm using is an SP 101 (110, 83) and has MC SP 75. I have it under a Thermal Grizzy contact frame. I haven't really attempted 7200 or 7400 because I don't believe the board has the capability for it, but it'll be interesting to see how 24Gbit M-die performs. At 7000, this board doesn't exhibit any re-train weirdness with Hynix 16Gbit A-die.
henlo:)
 
#23,920 ·
CR1 ? Asus equivalent of 1T ?

If so isn’t DDR5 made to use 2T ?

I was running my old DDR4 with 1T and the difference was pretty big in games vs 2T.