[Official] AMD Ryzen DDR4 24/7 Memory Stability Thread

647244 · May 14, 2021

For those that tried to run 2x16 dual rank 3800cl14 with tRCDRD 14, do you remember what type of errors you get on TM5?

TimeDrapery · May 14, 2021

Here's where I've ended up so far... Currently Karhu ... ing 😁😁😁😁😁

Veii said:
While you wait or try:
AMD CBS - NBIO - SMU Common Options,
DPM LCLK has to be at 2-1-1-2-2-1-1-2 or 2-1-1-1-2-1-1-1 & DF-States as of 1200 & 1202 still need to be disabled

@Veii

This is a pretty cool idea regardless of PCI-E GEN 3/4 or BAR/SAM being available/disabled/enabled... What positive impact(s) have you witnessed when configured as you described? What negative impact(s)? Thanks so much for sharing with us all... Again 😁😁😁😁😁

ManniX-ITA · May 14, 2021

Pegasuss said:
For those that tried to run 2x16 dual rank 3800cl14 with tRCDRD 14, do you remember what type of errors you get on TM5?

Almost everything at some point but with a preference of 0,6,4 and, same when trying to stabilize tRCDRD 15, the 2,10

Blameless · May 14, 2021

Adjusting the SMU DPM settings significantly reduced the rate of WHEA #19 errors past 1900 FCLK, but didn't eliminate them, and didn't make FCLK 1966 or higher any more usable. It almost, in conjunction with a bit of vSoC tuning, made 1933 viable on my ASRock B550 Phantom Gaming-ITX/AX setup, but there were still a few errors.

I can still POST at 2033 FCLK, but 1966 and 2000 are super flaky no matter what I do and constantly produce error 19s while dropping USB devices at random.

jomama22 said:
What I do find interesting is that most boards that people can get 4000 to work with whea are on the lowe-end/mid-teir end of the spectrum. Nothing to do with quality or w.e. but my guess would be that they lack a lot of the extra components (USB chips, networking chips, etc.) The higher end boards add on as frills.

I'm sure there is a board/FW component to the FLCK issue, but I'm not convinced most 5000 series CPUs will do 2000, even in an ideal board. The SMU and fabric hardware don't leave the CPU package on AM4 setups.

The DPM tweak having an effect makes sense, as that controls the frequency of the control fabric the SMU uses to poll and manage the CCDs and IOD, but barring firmware or power delivery issues, it doesn't make a whole lot of sense for FCLK potential to be determined by the board or the fluff on it.

647244 · May 14, 2021

ManniX-ITA said:
Almost everything at some point but with a preference of 0,6,4 and, same when trying to stabilize tRCDRD 15, the 2,10

I only get errors on test 10, I'm guessing there's nothing I can do about that?

Also, do you happen to know if its better to have tCWL at 14 with tRDWR 8 and tWRRD 3 than tCWL 12 with tRDWR 10, tWRRD 1? Just wondering because, I am seeing people with both setups but it probably does not make a difference?

ManniX-ITA · May 14, 2021

Pegasuss said:
I only get errors on test 10, I'm guessing there's nothing I can do about that?

Also, do you happen to know if its better to have tCWL at 14 with tRDWR 8 and tWRRD 3 than tCWL 12 with tRDWR 10, tWRRD 1? Just wondering because, I am seeing people with both setups but it probably does not make a difference?

Well if you only get error #10 you can try to fix it.
But last time I gave up as the price of fixing tRCDRD 15 was higher than keeping it at 16.

It does make a difference but I'm not sure which one is better.
10/1 allows SCL at 2 but is worse than SCL 4 on read bandwidth.
I usually try some combinations to see what works and how it changes.
Very often there's no choice.

TimeDrapery · May 14, 2021

Pegasuss said:
I only get errors on test 10, I'm guessing there's nothing I can do about that?

Also, do you happen to know if its better to have tCWL at 14 with tRDWR 8 and tWRRD 3 than tCWL 12 with tRDWR 10, tWRRD 1? Just wondering because, I am seeing people with both setups but it probably does not make a difference?

@Pegasuss

My board autos tRDWR to 9 and tWRRD to 2 with tCL 14 and tCWL 12

I remember somewhere it says...

tCWL - tCL + tRDWR ≤ 8

I imagine it will work for you too

KedarWolf · May 14, 2021

Are you a human?

www.newegg.com

DDR4 4000 (PC4 32000)
Timing 16-16-16-36
CAS Latency 16
Voltage 1.40V

Just bought this and only $2.01 more for rush shipping.

From newegg.ca though, but I link .com for you peeps as not too many of us are from Kanuckistan.

mongoled · May 14, 2021

For the record, tested several 5600x CPUs and all of them had different max post FCLK and different FCLK "holes"

The modified BIOSs we are using, although they unhide the features, are those features actually applied when we set them ???

I have tried the settings that are available in Eder modified A85 BIOS for the X570 Unify, they made no difference to how FCLK is acting.

In the past I have also tried disabling all peripherals in BIOS that could be disabled such as LAN, wLAN, Audio etc etc as well as droppig PCIe to 2x etc etc, non of these made any changes to WHEA 19 warnings

lmfodor · May 14, 2021

Hi @ManniX-ITA ,

ManniX-ITA said:
They both don't make a world of difference, agree
But there are very few games that can gain from better memory settings and it must be a difference in orders of magnitude, not just a few ms in latency.
While I have really a lot of games that can benefit from high threading; yes mostly are optimized up to 8 cores but if they find more there's always some gain.
Sometimes I open the task manager to see how the game is threading and I get a lot of nice surprises.
A lot of recent ports from consoles are happily using 12 threads.
But the game fps is usually limited by the 3-4 cores that are running the main threads and define the rendering pipeline.
That's why I try to optimize my OC for this kind of workload, pure ST and full MT is nice only for benchmark scores.
Having a lot of cores free makes gaming smoother, not only cause it's less likely some child thread is going to compete and slow down.
There's ample space for Windows to do its nasty unrequested and unwanted stuff in background.

I'm not sure SOTR is a good example to compare Low FPS between a 5800x and a 5950x.
Yes there have been a lot of improvements but there are many games more threaded than SOTR that should still show a substantial gain.
Still, doesn't make a world of difference...

It is definitely an issue with tCKE.
I'm testing with 20 iterations of AIDA latency.

View attachment 2490316

Have to run many more but tCKE at 16 looks like a good start.
I was able to get a 54.3ns and many 54.4ns with CkeSetup at 18 but a second round proven it to be weaker than I hoped.
Then I started to record stuff.

CkeSetup at 12 seems promising, almost stable 54.5ns.
But looks like is impacting PBO boost more than the others.
Have to find a stable 54.4ns setting to be satisfied

View attachment 2490317

How did you test so many tCKE values in the spreadsheet? What tool are you using? Maybe I should work with some Software that modifify the BIOS instead of rebooting and enter in the BIOS setup. I tried with the AsRock and event with the Asus V

Veii said:
The board makes a lot of fun, the led indicators are colour coded and noticable what error is what
The VRMs are really warm
It was around 60-70c while running y-cruncher 120A load. Felt that way, couldn't measure it. Hardwareluxx states 80c on a 5800X. Wouldn't run a 5950X on it
Dual intel 2.5gbit is useful and can be chained together as single 5gbit out
Coolers are a high quality, memory training is fine , CBS is fully opened so that's a big plus
I lack the dynamic OC feature but it has an own perf enhancer and the stilt's fmax enchance feature
Couldn't bypass yet the 120A fuse limit, but it has vcore and soc telemetry faking from 1000mA to 80 000mA.
BIOS is a bit sluggish but thats fine, its unlocked and this is all that matters
Usb 4.0 ports have no dropouts with my usb 3.0 mouse and focusrite usb 2.0 (switching issue on the ITX board)

It has a a WSON-8 chip and a new proprietary 14pin TPM header for SPI flash. Its not 9-0 anymore (10pin)
On the back are two tiny SOIC-8 romchips for both ethernet outs
M.2 Mount is screwless
No board led's except strip Aura Sync controll
My-Asus and Armoury Crate software are enabled by default but the option is easily visible to disable it before the first windows boot (soo noo .dll is injected into windows)
Turbo-Vcore works but the voltage access is little. Good enough its useful for CPU and RamOC

As for cpuOC again, the Mosfets are Weak and its a 4 phase board ~ but trippled
Switching freq moves between 150-350Khz, 5 loadlines and Asus Optomized+Manual Phase control mode
Current extenders go up till 140% but its just a bit underbuild with Vishay SIC 50A stages.
MemOC makes fun tho and should be just fine for a 5900X. 5950X needs heatsink modding or current limiting.
I would give it 210A max, 160A + 50A SOC & FCLK
=========================================
Whea #19 is a hardware design issue, and has nothing to with the CPUs
I'm sorry but everyone who has it, needs to refund their board ~ or wait 3+ months till PCB designers notice my post (later) and fix this
I am not capable to fix EFI modules and the chance to fix it is low.
It very likely needs a whole new revision of the affected boards | 40+ boards
And if it still is possible to rescue affected boards, it will take at absolute minimum 3+ months.
I expect half a year for it, till they rewrite and repair specific firmware parts of the board
Yet again, no guarantee as this is a design flaw

While you wait or try:
AMD CBS - NBIO - SMU Common Options,
DPM LCLK has to be at 2-1-1-2-2-1-1-2 or 2-1-1-1-2-1-1-1 & DF-States as of 1200 & 1202 still need to be disabled
Thats it, best of luck that your board is not affected
2100 1:1:1 is able to run on stock predicted values @ 36.9ohm proc or lower
2000 FCLK has to work for everyone without touching anything !

If 1933 FCLK WHEA #19, then you are out of luck
WHEA #18 is CPU Vcore related and needs a tiny 10mV positive vcore-offset bump

Full review of the board and explanation/thread about WHEA #19
Later today or at worst if memory missbehaves ~ tomorrow 👍

There are many board which are WHEA 19 free
But this is one of them, which doesn't have the design flaw
Although i really wish they would use a better PWM controller
Making it a 6+1 phase board / doubled
Instead a 4+4+4/+1+1 (12+2 tripled) board

Hi Veii, first of all I tried everything, DPM with your values 2-1-1-1-2-1-1-1 or 2-1-1-2-2-1-1-2 but it didn't work. Probe with DPM LCLK Enabled, there were two DPM options and I enabled them. Then I tried matching with the vSOC values. I think I should try lowering the LLC for a lower SOC amperage. But I had no luck, any combination with 1933 gives me an exaggerated amount of WHEA 19, so I am not among the lucky ones.

Now, rethinking what you said that the error is in the motherboards and that maybe they even have to make modifications in the circuits, and that almost all motherboards are bad, I think, all these motherboards came out before the 5000 series, so, AMD When launching this last line I announced the compatibility updating the firmware, but, then it is not the motherboards, or I mean, they were never prepared to support the high performance that the new line, so, or the firmware could fix the IF problem, or they should release new motherboards that effectively support what was announced by AMD in 2020. That will surely come out when they launch the new Rayzen 5000 "NextGen" It seems to me that this is where the problem comes from, let's say that admitting this it doesn't sell too much, better to say that 4000MHz is recommended and good, if it works better else try with Windows 1909 and there is no more WHEA .. Sorry for being simplistic. I had to repair server circuits that back in the late 90's cost 150k usd, yes, I worked on the old Compaq with the famous Proliant, and lived everything with motherboards and those pentiums from the first generations, but never on a large scale like this, they were specific corrections that Compaq and Intel engineers sent us via VHS, yes, VHS !! But this seems to me that it is an inconsistency of the processors with the mobos, and hopefully, let's continue waiting for the AMD engineers to achieve the long-awaited firmware, but the wait is long and if we continue arguing that the USB does not work, that is clearly by some communication channel of the famous IF, then how do we pretend that the memories work WHEA free knowing that error 19 is from I/O. Let's say that we are looking for high performance almost as a hobby, already in the values that we have , we are playing in the first leagues.

Well, it seems I'm not gonna buy the Unify X, in fact I have a B550 ASRock Phantom Gaiming, with a 3700x that I used just one month. Perhaps I should try with this board.. maybe it works better that the CH8 Wifi with so many stuff. I'm going to rest a bit so I stop the frustration of continuing to try WHEA free .. at least I have the battle to lower the blessed tRCDRD without the burst of errors 6 and the PCB Crash .. I will find a way at least for those errors 6 .or change this Kit for the 3600CL16 4x8 that work much better than these.

lmfodor · May 14, 2021

ManniX-ITA said:
Have to run many more but tCKE at 16 looks like a good start.
I was able to get a 54.3ns and many 54.4ns with CkeSetup at 18 but a second round proven it to be weaker than I hoped.
Then I started to record stuff.

CkeSetup at 12 seems promising, almost stable 54.5ns.
But looks like is impacting PBO boost more than the others.
Have to find a stable 54.4ns setting to be satisfied

Hi @ManniX-ITA , Help me with a piece of information, how do you do these tests? Do you modify the values from Windows with some BIOS software, or do you reboot and record the values? I would love to try this just like you do. In fact I am looking for some software that modifies the BIOS values from Windows, the ones I tested did not work for me. I know there is one from ASRock and another old one from Asus

Thanks!

ManniX-ITA · May 14, 2021

lmfodor said:
Hi @ManniX-ITA , Help me with a piece of information, how do you do these tests? Do you modify the values from Windows with some BIOS software, or do you reboot and record the values? I would love to try this just like you do. In fact I am looking for some software that modifies the BIOS values from Windows, the ones I tested did not work for me. I know there is one from ASRock and another old one from Asus

Change in BIOS and boot every time in Windows...
I wouldn't trust a memory setting change via Windows.

lmfodor · May 14, 2021

ManniX-ITA said:
Change in BIOS and boot every time in Windows...
I wouldn't trust a memory setting change via Windows.

Hi Mannix!

And how did you finish with the latency tests? 56-0-12 and tCKE 16 seem to be the most stable, right? I am adjusting my voltage values. Everything contrasted with the above, with everything adjusted as you can see in my timings - less tRCDRD - that it is in 16, I am in 1.48V of VDIMM, 1.1 of vSOC, and the other values in relation. Then ProcODT low for a better signal, Cadbus 40-20-20-20 and tCKE 1 .. the latency varies a lot, but I'm going to run the test alone and do the same exercise to see how it works. I'm still amazed by the voltage values. everyone recommended me to go up to 1.55 easy and I'm at 1.48 .. passing all the y-cruncher tests, OCCT Extreme Large all SSR, AVX and AVX2 and TM5 almost for a day. more nights of HCI memtest ..

I think that if we can lower the tRCDRD looking for some way to avoid the PCB Crash (errors 6, 12, 0), we can lower it and increase the bandwidth It's steadfast, but at 15 I got a much better reading so at 14 it should be much better. But precisely the alignment of the VDIMM and vSOC + the ProcODT and the RTTs are the key. There must be some calculation of voltages and impedances, I say, it is the least developed, but RQZ 240 + ProcODT + cadbus all in ohms against the current, VSOC and VDIMM should line up. I didn't find much of this. Always only from timings. but little related to voltages and resistances

Sent from my iPhone using Tapatalk Pro

PJVol · May 14, 2021

Veii said:
DPM LCLK has to be at 2-1-1-2-2-1-1-2 or 2-1-1-1-2-1-1-1 & DF-States as of 1200 & 1202 still need to be disabled

Hey!
Tried it just for curiosity's sake...
...so they literally do nothing on my board/cpu, and according to metrics, LCLK3 max freq. always stays at 592Mhz and LCLK3 eff. freq. dropped as low as ~290 in idle, regardless of CBS settings including DF C-states and APB (though couple of ~ weeks ago had seen both lclk's at 302Mhz) - tested with GPU-Z built-in render test, which stresses PCIe. And IIRC LCLK not much dependent on DF power saving, being separate clock domain, though not sure, may be wrong here.
Anyway, I personally still I think that WHEA 19 issue is on both sides, cpu and mb, so I'm really looking forward to your story

The only thing I can't understand is what all this fuss about these WHEA per se. Whoever I ask what impact they have on performance or stability, I still can't get a definitive answer.
I admit if it would be a case like mine, when performance degrades unless bruteforced with VDD18, then its clearly dissapointment, given that max. allowed vdd18 on my board - 2.1V - barely enough to stabilize 2033-2066 max.
IDK, what people are complain about

RonLazer · May 14, 2021

It's a good point, I think people worry about WHEAs because it's a sign that the hardware is unhappy, but if they are infrequent enough that they don't degrade performance then really they're just a feature of the data-fabric error-correction mechanism working as intended. Provided the voltages used to run the infinity fabric at that speed aren't excessive then there's no risk of damage. The GloFo 12nm process is typically more sensitive to voltage than current, not that 1900MHz vs 2000MHz is a significant amount of extra current anyway.

Dar|{cyde · May 14, 2021

I'm starting to think I'll just ignore WHEA 19's. If my rig can pass MT5, y-cruncher, p95, and OCCT, what do I care if it puts warnings in the event log? Honestly I haven't found that stability point yet... but I'm probably just pushing the timings too hard.

craxton · May 14, 2021

question for anyone that can answer,

ive ran TM5 25 cycles for over 10 hours now, but its still not finished and
its not using any ram at all on my system at this time...

is it possible to be bugged due to hibernating last night?????
been on cycle 24 since 8 hour mark...

Veii · May 14, 2021

@PJVol like you mentioned the readouts are correct
The reason for setting DPM LCLK state not PCIe one is only to enforce AMDs default behavior
At least how it should behave
LV3 since dLDO injection "unlock" should stay at 600mhz, not at 300
It was 2-1-1-1 bellow 1200 and probably SMU 56.44 is a middle step, as it was also used on 1191 and 1180/1181
SMU 56.45 should have been the standard 1.2.0.0 although its arguable if its 1200A(AB) or 1201
SMU 56.50 is 1202 but not every board has a pure 1202, some again are 1200++ or 1201A
Depending on the applied state of usb fix patch
(Which created the issued for me on the ITX between Type C and USB 3.0)
And some have the IMC FW rewrite on 56.45 others like on asrock only got everything new on 1202
Although i can say that 1201 behaved abnormal when it comes to my timings

Ignoring now the changes which first gen and 2nd gen users see

The WHEA #19 issue relates to a chip on the boards, a component handled by the chipset
And communication towards the chipset from the I/O die is an issue
It belongs to the usb issues, but they are an endproduct or "sideeffect" of the issue
EDIT:
Same as unstable PCIe 4.0 on FCLK @ and beyond 2000Mhz, is an "sideeffect" of the issue
I continue to drive the route that every Vermeer chip can reach 2000 FCLK ~ IF PCIe 4.0 doesn't dropout till then, but 1967 is 110% possible

The reason why 1909 behaves probably better ~ although no changes for unaffected boards up to 21H2
Is that the driver loaded with the numerous patches that where tried to be applied publicly and in the hidden between couple board manufactures
I suspect that every board manufacture "now" knows the issue, but either because of
A.) Brand Ashaming (semiconductor ?)
B.) NDA with the faith to resolve it in 3+ months
remains silent.
Maybe X570S will ring a bell too

One of both, but i suspect the problem maker enforced an NDA in exchange to potentially fix the issue and rewrite the FW ~ soo they wont lose margin because of the refunds, when the issue is public
As, as stupid as it sounds, neither of the board partners can much against the FW issue ~ when they followed their schematics accurately

Maybe at this point of the story, the issue rings to someone who followed it couple of bios revisions ago
I think I can talk about it, but its not something that will be liked ~ being heard
And also because i respect the semiconductors work (except this nonsense here) , i need to be cautious how i form words not to brand shame them

Overall, it is an IO issue
DPM advice above was to fix something that is inconsistent and can be part of the communication problem with the IO-Die to the chipset

I want to re-mention that the chipset does not matter here nor the series
(if 300 series would have support and didn't use this semiconductor part ~ they also would be WHEA 19 free)
I think (again), affected users can ignore this error fully
But it will cause continuous DPC calls, soo unless logging can be disabled for this specific issue ~ it will oppose a performance and latency penalty & variation

Sadly disabling all IO does not resolve the issue
Maybe erasing the module from the bios could be a fix 🤔
But people would lose I/O functionality ~ although that is resolvable through Type-C adapters 🙄🤔

Edit 2:
The problem with this actually 'little" issue,
Aside from brand misstrust ~ which will stay for a long time now
Or the lost of jobs & salary it brings with it. Not to forget each of the board partners who lose a big cut
Is that it affects more than 80% of the boards
The number is likely even higher
And the wealth and payment of all these workers depend on this one semiconductor, who messed up and was problematic to talk with before the usb issues where public

Soo it's really a fragile topic to talk about, even when the issue is soo simple and little. The tail of issues, on the problem maker is long and will have trust sideeffects for the next year at least, in the pc component market 😐
Eh at least their product functions ~ its an enthusiast complain, soo maybe it can be fine for cheaper devices 🤔

Veii · May 14, 2021

craxton said:
thats something i believe ALL BOARDS with EZ DEBUG led should do... most the time
cant even tell without a flashlight unless one knows the order anyhow.

Basic colour and brightness change
Helps you see the issue from 1m away
Strongly appreciate this little change ~ even when debug codes sequences could be more accurate

craxton said:
all these settings would perhaps make it easier to overclock in general, but none the less STILL FIGHTING MSI
to unlock CPU VDDP....it hasnt been said time limit yet the closed BOTH my tickets for the emails ive sent both with the same
responses...
perhaps ASUS would simply be the (fix for all) at this point... but i myself have only used MSI bios

Ask them about Standby VDDP voltage access, which should be between 900-930mV
Sadly the board doesn't allow to go lower than that, but at least it's 900mV already

Dreamic said:
Of course my B550 Tomahawk doesn't have the option to set DPM LCLK like this, not that it would probably even matter, if I got an unlocked BIOS or something with the option.
You or someone should maybe make a Google Sheet or something of like verified/confirmed WHEA-free boards to buy, would definitely be useful information.

A list will happen

Tho last time i made a huge list here it was removed because either
A.) The bot didn't like the length of the big list (in a spoiler)
Or B.) The affected board partner didn't like the results digging on their RGB drivers and why they cant hold consistency there haha

(WHEA 19 is not an RGB issue) 🙈
Don't worry too much about DPM CLCK
it was an advice how it has to function for better cache and interconnect performance, but not a requirement to be WHEA free
New bioses after SMU 56.44 do set it correctly ~ just not always
Soo a consistency advice there if you have access

Collected till today a list of serval examples for voltage scaling and timinga from CL9-9-9 , CL12-12-12 to my current set, between FCLKs and auto XMP predictions
(As XMP predictions finally function)
I want to review this board at the same time as making the issue public
It needs preparation and i needed more time testing the quirks of this bios, with access to all the options

Soo probably in a new thread or two
Will still reveal it in less than 24h

mirzet1976 · May 14, 2021

craxton said:
question for anyone that can answer,

ive ran TM5 25 cycles for over 10 hours now, but its still not finished and
its not using any ram at all on my system at this time...

is it possible to be bugged due to hibernating last night?????
been on cycle 24 since 8 hour mark...
View attachment 2490431

There is something similar, the PC was turned on for 3 days and then I did the Aida64 benchmark 3 runs and the result is ...

[Official] AMD Ryzen DDR4 24/7 Memory Stability Thread

647244

TimeDrapery

ManniX-ITA

Blameless

647244

ManniX-ITA

TimeDrapery

KedarWolf

Are you a human?

mongoled

lmfodor

lmfodor

ManniX-ITA

lmfodor

PJVol

RonLazer

Dar|{cyde

craxton

Veii

Veii

mirzet1976

Top Contributors this Month

Recommended Communities