Alright, some high level guys over at XS have discovered something interesting with the P965 / 975X chipsets. You may want to read through it all here, or just take my summary:
Your north bridge has an internal clock speed and latencies just like your CPU and memory. The FSB of your north bridge can be found by dividing your original CPU multiplier by your set CPU multiplier and then multiplying by your FSB.
So if you are running a E6600 (266 * 9) at 400Mhz x 8 your NB FSB is:
(9 / 8) x 400 = 450Mhz FSB (1800Mhz Total)
Just like your memory may be able to run at 4-4-4-12 at 1000Mhz but needs to run at 5-5-5-15 at 1200Mhz, your north bridge has a series of latencies which it must adjust in order to maintain stability at its FSB. These latencies seem to play a far more significant role in system performance than memory latencies.
Intel has predefined specific latencies at specific NB FSB speeds. They are referred to as straps. There is a strap for when the NB FSB is 1066Mhz and under, 1333Mhz FSB and under, 1600Mhz FSB and under, ect. When you go from the 1066Mhz FSB strap to the 1333Mhz FSB strap, the north bridge's internal latencies loosen to allow for greater stability.
ASUS has redefined the NB strap so that the 1333Mhz FSB strap does not come into effect until 401Mhz FSB (1604Mhz). Other perimeters of straps are somewhat unknown.
Tony, the guy who pretty much figured all this out has since been hired by OCZ (they were impressed). He is now a lobbyist trying to get ASUS and other major motherboard manufacturers to give the end user the control of when straps start.
There are 2 ways to beat the NB strap:
1. Boot to windows in the 1066Mhz strap and then use Clockgen to increase your CPU's FSB. You can then get to a much higher FSB while maintaining the 1066Mhz strap simply because the BIOS does not adjust the north bridge's latencies in real time.
2. Get a X6800 or QX6700 (or even a ES chip). To the north bridge, you are always at a default multiplier with a Extreme Edition processor. This allows you to set a much lower or higher multiplier without the NB FSB being effected.
Look at these Super Pi 32M results:
Quote:
Quote:
Quote:
Quote:
I will be adding to this as I learn more.
Your north bridge has an internal clock speed and latencies just like your CPU and memory. The FSB of your north bridge can be found by dividing your original CPU multiplier by your set CPU multiplier and then multiplying by your FSB.
So if you are running a E6600 (266 * 9) at 400Mhz x 8 your NB FSB is:
(9 / 8) x 400 = 450Mhz FSB (1800Mhz Total)
Just like your memory may be able to run at 4-4-4-12 at 1000Mhz but needs to run at 5-5-5-15 at 1200Mhz, your north bridge has a series of latencies which it must adjust in order to maintain stability at its FSB. These latencies seem to play a far more significant role in system performance than memory latencies.
Intel has predefined specific latencies at specific NB FSB speeds. They are referred to as straps. There is a strap for when the NB FSB is 1066Mhz and under, 1333Mhz FSB and under, 1600Mhz FSB and under, ect. When you go from the 1066Mhz FSB strap to the 1333Mhz FSB strap, the north bridge's internal latencies loosen to allow for greater stability.
ASUS has redefined the NB strap so that the 1333Mhz FSB strap does not come into effect until 401Mhz FSB (1604Mhz). Other perimeters of straps are somewhat unknown.
Tony, the guy who pretty much figured all this out has since been hired by OCZ (they were impressed). He is now a lobbyist trying to get ASUS and other major motherboard manufacturers to give the end user the control of when straps start.
There are 2 ways to beat the NB strap:
1. Boot to windows in the 1066Mhz strap and then use Clockgen to increase your CPU's FSB. You can then get to a much higher FSB while maintaining the 1066Mhz strap simply because the BIOS does not adjust the north bridge's latencies in real time.
2. Get a X6800 or QX6700 (or even a ES chip). To the north bridge, you are always at a default multiplier with a Extreme Edition processor. This allows you to set a much lower or higher multiplier without the NB FSB being effected.
Look at these Super Pi 32M results:
Quote:
Boot @ 400x9 Boot @ 402x9 Boot @ 400 & CLG to 402 DDR2-800 --> 14:10.969 DDR2-804 --> 14:42.922 DDR2-804 --> 14:06.672 DDR2-1000 --> 13:35.765 DDR2-1004 --> 14:07.297 DDR2-1004 --> 13:32.562 DDR2-1200 --> 13:17.109 DDR2-1206 --> 13:51.891 DDR2-1206 --> 13:13.109 |
Quote:
Quote:
ok, I have came to a conclusion of my own... when you use clockgen or another "windows" program to change the clock, apparently you cheat the board in a way that it doesn't apply the next strap, so you keep the best of both worlds, a faster strap and an fsb/clock increase... that has lead me to another point: probably when rising the FSB with clockgen you will reach a crash/limit must earlier than by doing that using the bios... so, let's say, if you can reach 500mhz by setting it in the bios, you will only reach 430mhz when using clockgen, that's because of the faster strap used when rising from windows (clockgen)... someone with hardware could test that !! I don't have my C2D rig yet... |
Quote:


I will be adding to this as I learn more.